190 lines
5.5 KiB
C
190 lines
5.5 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#include "ch.h"
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#include "hal.h"
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/* TRUE means that DMA-accessible buffers are placed in a non-cached RAM
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area and that no cache management is required.*/
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#define DMA_BUFFERS_COHERENCE TRUE
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/*===========================================================================*/
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/* GPT driver related. */
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/*===========================================================================*/
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/*
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* GPT4 configuration. This timer is used as trigger for the ADC.
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*/
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static const GPTConfig gpt4cfg1 = {
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.frequency = 1000000U,
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.callback = NULL,
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.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
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.dier = 0U
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};
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/*===========================================================================*/
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/* ADC driver related. */
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/*===========================================================================*/
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#define ADC_GRP1_NUM_CHANNELS 2
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#define ADC_GRP1_BUF_DEPTH 64
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#if !DMA_BUFFERS_COHERENCE
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/* Note, the buffer is aligned to a 32 bytes boundary because limitations
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imposed by the data cache. Note, this is GNU specific, it must be
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handled differently for other compilers.
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Only required if the ADC buffer is placed in a cache-able area.*/
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#if defined(__GNUC__)
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__attribute__((aligned (32)))
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#endif
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#endif
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static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH];
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/*
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* ADC streaming callback.
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*/
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size_t nx = 0, ny = 0;
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static void adccallback(ADCDriver *adcp) {
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#if !DMA_BUFFERS_COHERENCE
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/* DMA buffer invalidation because data cache, only invalidating the
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half buffer just filled.
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Only required if the ADC buffer is placed in a cache-able area.*/
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dmaBufferInvalidate(buffer,
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n * adcp->grpp->num_channels * sizeof (adcsample_t));
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#endif
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/* Updating counters.*/
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if (adcIsBufferComplete(adcp)) {
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nx += 1;
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}
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else {
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ny += 1;
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}
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}
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/*
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* ADC errors callback, should never happen.
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*/
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static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
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(void)adcp;
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(void)err;
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}
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/*
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* ADC conversion group.
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* Mode: Continuous, 16 samples of 2 channels, HS triggered by
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* GPT4-TRGO.
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* Channels: Sensor, VRef.
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*/
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static const ADCConversionGroup adcgrpcfg1 = {
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true,
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ADC_GRP1_NUM_CHANNELS,
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adccallback,
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adcerrorcallback,
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0, /* CR1 */
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ADC_CR2_EXTEN_RISING | ADC_CR2_EXTSEL_SRC(12), /* CR2 */
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ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) |
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ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), /* SMPR1 */
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0, /* SMPR2 */
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0, /* HTR */
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0, /* LTR */
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0, /* SQR1 */
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0, /* SQR2 */
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ADC_SQR3_SQ2_N(ADC_CHANNEL_SENSOR) |
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ADC_SQR3_SQ1_N(ADC_CHANNEL_VREFINT) /* SQR3 */
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};
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/*===========================================================================*/
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/* Application code. */
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/*===========================================================================*/
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/*
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* This is a periodic thread that does absolutely nothing except flashing
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* a LED attached to TP1.
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*/
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static THD_WORKING_AREA(waThread1, 128);
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static THD_FUNCTION(Thread1, arg) {
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(void)arg;
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chRegSetThreadName("blinker");
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palSetLineMode(LINE_ARD_D13, PAL_MODE_OUTPUT_PUSHPULL);
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while (true) {
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palSetLine(LINE_ARD_D13);
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chThdSleepMilliseconds(500);
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palClearLine(LINE_ARD_D13);
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chThdSleepMilliseconds(500);
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}
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}
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/*
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* Application entry point.
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*/
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int main(void) {
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/*
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* System initializations.
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* - HAL initialization, this also initializes the configured device drivers
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* and performs the board-specific initializations.
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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halInit();
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chSysInit();
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/*
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* Activates the serial driver 1 using the driver default configuration.
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*/
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sdStart(&SD1, NULL);
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/*
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* Starting GPT4 driver, it is used for triggering the ADC.
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*/
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gptStart(&GPTD4, &gpt4cfg1);
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/*
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* Fixed an errata on the STM32F7xx, the DAC clock is required for ADC
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* triggering.
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*/
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rccEnableDAC1(false);
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/*
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* Activates the ADC1 driver and the temperature sensor.
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*/
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adcStart(&ADCD1, NULL);
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adcSTM32EnableTSVREFE();
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/*
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* Starts an ADC continuous conversion triggered with a period of
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* 1/10000 second.
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*/
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adcStartConversion(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);
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gptStartContinuous(&GPTD4, 100);
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/*
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* Creates the example thread.
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*/
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chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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/*
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* Normal main() thread activity, in this demo it does nothing.
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*/
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while (true) {
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chThdSleepMilliseconds(500);
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}
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}
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