182 lines
6.1 KiB
C
182 lines
6.1 KiB
C
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
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This file is part of ChibiOS.
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ChibiOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file chcore_v7m.c
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* @brief ARMv7-M architecture port code.
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*
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* @addtogroup ARMCMx_V7M_CORE
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* @{
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*/
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#include "ch.h"
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/*===========================================================================*/
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/* Module local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module local types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Module interrupt handlers. */
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/*===========================================================================*/
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#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) || defined(__DOXYGEN__)
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/**
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* @brief SVC vector.
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* @details The SVC vector is used for exception mode re-entering after a
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* context switch.
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* @note The PendSV vector is only used in advanced kernel mode.
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*/
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void SVC_Handler(void) {
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/*lint -restore*/
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struct port_extctx *ctxp;
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#if CORTEX_USE_FPU
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/* Enforcing unstacking of the FP part of the context.*/
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FPU->FPCCR &= ~FPU_FPCCR_LSPACT_Msk;
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#endif
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/* The port_extctx structure is pointed by the PSP register.*/
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ctxp = (struct port_extctx *)__get_PSP();
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/* Discarding the current exception context and positioning the stack to
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point to the real one.*/
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ctxp++;
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/* Restoring real position of the original stack frame.*/
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__set_PSP((uint32_t)ctxp);
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/* Restoring the normal interrupts status.*/
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port_unlock_from_isr();
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}
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#endif /* CORTEX_SIMPLIFIED_PRIORITY == FALSE */
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#if (CORTEX_SIMPLIFIED_PRIORITY == TRUE) || defined(__DOXYGEN__)
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/**
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* @brief PendSV vector.
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* @details The PendSV vector is used for exception mode re-entering after a
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* context switch.
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* @note The PendSV vector is only used in compact kernel mode.
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*/
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/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
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void PendSV_Handler(void) {
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/*lint -restore*/
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struct port_extctx *ctxp;
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#if CORTEX_USE_FPU
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/* Enforcing unstacking of the FP part of the context.*/
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FPU->FPCCR &= ~FPU_FPCCR_LSPACT_Msk;
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#endif
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/* The port_extctx structure is pointed by the PSP register.*/
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ctxp = (struct port_extctx *)__get_PSP();
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/* Discarding the current exception context and positioning the stack to
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point to the real one.*/
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ctxp++;
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/* Writing back the modified PSP value.*/
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__set_PSP((uint32_t)ctxp);
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}
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#endif /* CORTEX_SIMPLIFIED_PRIORITY == TRUE */
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/*===========================================================================*/
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/* Module exported functions. */
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/*===========================================================================*/
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#if ((CH_DBG_ENABLE_STACK_CHECK == TRUE) && \
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(PORT_ENABLE_GUARD_PAGES == TRUE)) || \
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defined(__DOXYGEN__)
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/**
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* @brief Setting up MPU region for the current thread.
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*/
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void _port_set_region(void) {
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mpuSetRegionAddress(PORT_USE_MPU_REGION,
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chThdGetSelfX()->wabase);
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}
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#endif
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/**
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* @brief Exception exit redirection to _port_switch_from_isr().
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*/
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void _port_irq_epilogue(void) {
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port_lock_from_isr();
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if ((SCB->ICSR & SCB_ICSR_RETTOBASE_Msk) != 0U) {
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struct port_extctx *ctxp;
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#if CORTEX_USE_FPU == TRUE
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/* Enforcing a lazy FPU state save by accessing the FPCSR register.*/
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(void) __get_FPSCR();
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#endif
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/* The port_extctx structure is pointed by the PSP register.*/
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ctxp = (struct port_extctx *)__get_PSP();
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/* Adding an artificial exception return context, there is no need to
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populate it fully.*/
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ctxp--;
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/* Setting up a fake XPSR register value.*/
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ctxp->xpsr = (regarm_t)0x01000000;
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#if CORTEX_USE_FPU == TRUE
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ctxp->fpscr = (regarm_t)FPU->FPDSCR;
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#endif
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/* Writing back the modified PSP value.*/
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__set_PSP((uint32_t)ctxp);
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/* The exit sequence is different depending on if a preemption is
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required or not.*/
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if (chSchIsPreemptionRequired()) {
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/* Preemption is required we need to enforce a context switch.*/
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ctxp->pc = (regarm_t)_port_switch_from_isr;
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}
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else {
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/* Preemption not required, we just need to exit the exception
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atomically.*/
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ctxp->pc = (regarm_t)_port_exit_from_isr;
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}
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/* Note, returning without unlocking is intentional, this is done in
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order to keep the rest of the context switch atomic.*/
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return;
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}
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port_unlock_from_isr();
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}
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/** @} */
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