605 lines
16 KiB
C
605 lines
16 KiB
C
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/*
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Copyright (C) 2014..2017 Marco Veeneman
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file PWM/hal_pwm_lld.c
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* @brief TM4C123x/TM4C129x PWM subsystem low level driver.
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*
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* @addtogroup PWM
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* @{
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*/
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#include "hal.h"
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#if HAL_USE_PWM || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/**
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* @brief PWMD1 driver identifier.
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*/
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#if TIVA_PWM_USE_PWM0 || defined(__DOXYGEN__)
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PWMDriver PWMD1;
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#endif
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/**
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* @brief PWMD2 driver identifier.
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*/
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#if TIVA_PWM_USE_PWM1 || defined(__DOXYGEN__)
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PWMDriver PWMD2;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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static uint32_t pwm_generator_offsets[] = { PWM_GEN_0_OFFSET, PWM_GEN_1_OFFSET, PWM_GEN_2_OFFSET, PWM_GEN_3_OFFSET};
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Common PWM Generator IRQ handler.
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* @note It is assumed that the various sources are only activated if the
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* associated callback pointer is not equal to @p NULL in order to not
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* perform an extra check in a potentially critical interrupt handler.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] i pwm generator number
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*/
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static void pwm_lld_serve_generator_interrupt (PWMDriver *pwmp, uint8_t i)
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{
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uint32_t isc;
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uint32_t pwm = pwmp->pwm;
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isc = HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_ISC);
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HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_ISC) = isc;
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if (((isc & PWM_X_ISC_INTCMPAD) != 0) &&
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(pwmp->config->channels[i * 2 + 0].callback != NULL)) {
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pwmp->config->channels[i * 2 + 0].callback(pwmp);
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}
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if (((isc & PWM_X_ISC_INTCMPAU) != 0) &&
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(pwmp->config->channels[i * 2 + 0].callback != NULL)) {
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pwmp->config->channels[i * 2 + 0].callback(pwmp);
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}
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if (((isc & PWM_X_ISC_INTCMPBD) != 0) &&
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(pwmp->config->channels[i * 2 + 1].callback != NULL)) {
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pwmp->config->channels[i * 2 + 1].callback(pwmp);
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}
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if (((isc & PWM_X_ISC_INTCMPBU) != 0) &&
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(pwmp->config->channels[i * 2 + 1].callback != NULL)) {
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pwmp->config->channels[i * 2 + 1].callback(pwmp);
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}
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if (((isc & PWM_X_ISC_INTCNTLOAD) != 0) && (pwmp->config->callback != NULL)) {
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pwmp->config->callback(pwmp);
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}
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if (((isc & PWM_X_ISC_INTCNTZERO) != 0) && (pwmp->config->callback != NULL)) {
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pwmp->config->callback(pwmp);
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}
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}
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/**
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* @brief Common PWM fault IRQ handler.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*/
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static void pwm_lld_serve_fault_interrupt (PWMDriver *pwmp)
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{
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(void) pwmp;
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if TIVA_PWM_USE_PWM0
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#if !defined(TIVA_PWM0FAULT_HANDLER)
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#error "TIVA_PWM0FAULT_HANDLER not defined"
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#endif
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/*
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* @brief PWM0 Fault handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM0FAULT_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_fault_interrupt(&PWMD1);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM0GEN0_HANDLER)
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#error "TIVA_PWM0GEN0_HANDLER not defined"
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#endif
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/*
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* @brief PWM0 Generator 0 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM0GEN0_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD1, 0);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM0GEN1_HANDLER)
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#error "TIVA_PWM0GEN1_HANDLER not defined"
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#endif
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/*
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* @brief PWM0 Generator 1 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM0GEN1_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD1, 1);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM0GEN2_HANDLER)
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#error "TIVA_PWM0GEN2_HANDLER not defined"
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#endif
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/*
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* @brief PWM0 Generator 2 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM0GEN2_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD1, 2);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM0GEN3_HANDLER)
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#error "TIVA_PWM0GEN3_HANDLER not defined"
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#endif
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/*
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* @brief PWM0 Generator 3 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM0GEN3_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD1, 3);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#if TIVA_PWM_USE_PWM1
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#if !defined(TIVA_PWM1FAULT_HANDLER)
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#error "TIVA_PWM1FAULT_HANDLER not defined"
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#endif
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/*
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* @brief PWM1 Fault handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM1FAULT_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_fault_interrupt(&PWMD2);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM1GEN0_HANDLER)
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#error "TIVA_PWM1GEN0_HANDLER not defined"
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#endif
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/*
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* @brief PWM1 Generator 0 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM1GEN0_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD2, 0);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM1GEN1_HANDLER)
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#error "TIVA_PWM1GEN1_HANDLER not defined"
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#endif
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/*
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* @brief PWM1 Generator 1 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM1GEN1_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD2, 1);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM1GEN2_HANDLER)
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#error "TIVA_PWM1GEN2_HANDLER not defined"
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#endif
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/*
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* @brief PWM1 Generator 2 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM1GEN2_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD2, 2);
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OSAL_IRQ_EPILOGUE();
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}
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#if !defined(TIVA_PWM1GEN3_HANDLER)
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#error "TIVA_PWM1GEN3_HANDLER not defined"
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#endif
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/*
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* @brief PWM1 Generator 3 handler
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(TIVA_PWM1GEN3_HANDLER)
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{
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OSAL_IRQ_PROLOGUE();
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pwm_lld_serve_generator_interrupt(&PWMD2, 3);
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level PWM driver initialization.
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*
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* @notapi
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*/
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void pwm_lld_init(void)
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{
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/* Driver initialization.*/
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#if TIVA_PWM_USE_PWM0
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pwmObjectInit(&PWMD1);
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PWMD1.channels = PWM_CHANNELS;
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PWMD1.pwm = PWM0_BASE;
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#endif
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#if TIVA_PWM_USE_PWM1
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pwmObjectInit(&PWMD2);
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PWMD2.channels = PWM_CHANNELS;
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PWMD2.pwm = PWM1_BASE;
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#endif
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}
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/**
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* @brief Configures and activates the PWM peripheral.
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* @note Starting a driver that is already in the @p PWM_READY state
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* disables all the active channels.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_start(PWMDriver *pwmp)
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{
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uint8_t i;
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uint32_t invert = 0;
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uint32_t enable = 0;
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uint32_t pwm = pwmp->pwm;
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if (pwmp->state == PWM_STOP) {
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/* Clock activation.*/
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#if TIVA_PWM_USE_PWM0
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if (&PWMD1 == pwmp) {
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HWREG(SYSCTL_RCGCPWM) |= (1 << 0);
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while (!(HWREG(SYSCTL_PRPWM) & (1 << 0)))
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;
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nvicEnableVector(TIVA_PWM0FAULT_NUMBER,
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TIVA_PWM_PWM0_FAULT_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM0GEN0_NUMBER, TIVA_PWM_PWM0_0_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM0GEN1_NUMBER, TIVA_PWM_PWM0_1_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM0GEN2_NUMBER, TIVA_PWM_PWM0_2_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM0GEN3_NUMBER, TIVA_PWM_PWM0_3_IRQ_PRIORITY);
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}
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#endif
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#if TIVA_PWM_USE_PWM1
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if (&PWMD2 == pwmp) {
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HWREG(SYSCTL_RCGCPWM) |= (1 << 1);
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while (!(HWREG(SYSCTL_PRPWM) & (1 << 1)))
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;
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nvicEnableVector(TIVA_PWM1FAULT_NUMBER,
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TIVA_PWM_PWM1_FAULT_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM1GEN0_NUMBER, TIVA_PWM_PWM1_0_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM1GEN1_NUMBER, TIVA_PWM_PWM1_1_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM1GEN2_NUMBER, TIVA_PWM_PWM1_2_IRQ_PRIORITY);
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nvicEnableVector(TIVA_PWM1GEN3_NUMBER, TIVA_PWM_PWM1_3_IRQ_PRIORITY);
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}
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#endif
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}
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else {
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/* Driver re-configuration scenario, it must be stopped first.*/
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HWREG(pwm + PWM_O_0_CTL) = 0;
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HWREG(pwm + PWM_O_1_CTL) = 0;
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HWREG(pwm + PWM_O_2_CTL) = 0;
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HWREG(pwm + PWM_O_3_CTL) = 0;
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}
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/* Timer configuration.*/
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for (i = 0; i < (PWM_CHANNELS >> 1); i++) {
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HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_CTL) = 0;
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HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_GENA) = 0x08C;
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HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_GENB) = 0x80C;
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HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_LOAD) = (uint16_t)(pwmp->config->frequency - 1);
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HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_CMPA) = (uint16_t)(pwmp->period - 1);
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HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_CMPB) = (uint16_t)(pwmp->period - 1);
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}
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/* Output enables and polarities setup.*/
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for (i = 0; i < PWM_CHANNELS; i++) {
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switch (pwmp->config->channels[i].mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_DISABLED:
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enable &= ~(1 << i);
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break;
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case PWM_OUTPUT_ACTIVE_LOW:
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invert |= (1 << i);
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enable |= (1 << i);
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break;
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case PWM_OUTPUT_ACTIVE_HIGH:
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invert &= ~(1 << i);
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enable |= (1 << i);
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break;
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default:
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;
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}
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}
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HWREG(pwm + PWM_O_INVERT) = invert;
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HWREG(pwm + PWM_O_ENABLE) = enable;
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HWREG(pwm + PWM_O_ISC) = 0xFFFFFFFF;
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}
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/**
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* @brief Deactivates the PWM peripheral.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_stop(PWMDriver *pwmp)
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{
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uint32_t pwm = pwmp->pwm;
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/* If in ready state then disables the PWM clock.*/
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if (pwmp->state == PWM_READY) {
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HWREG(pwm + PWM_O_0_CTL) = 0;
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HWREG(pwm + PWM_O_1_CTL) = 0;
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HWREG(pwm + PWM_O_2_CTL) = 0;
|
||
|
HWREG(pwm + PWM_O_3_CTL) = 0;
|
||
|
|
||
|
#if TIVA_PWM_USE_PWM0
|
||
|
if (&PWMD1 == pwmp) {
|
||
|
nvicDisableVector(TIVA_PWM0FAULT_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM0GEN0_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM0GEN1_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM0GEN2_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM0GEN3_NUMBER);
|
||
|
HWREG(SYSCTL_RCGCPWM) &= ~(1 << 0);
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
#if TIVA_PWM_USE_PWM1
|
||
|
if (&PWMD2 == pwmp) {
|
||
|
nvicDisableVector(TIVA_PWM1FAULT_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM1GEN0_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM1GEN1_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM1GEN2_NUMBER);
|
||
|
nvicDisableVector(TIVA_PWM1GEN3_NUMBER);
|
||
|
HWREG(SYSCTL_RCGCPWM) &= ~(1 << 1);
|
||
|
}
|
||
|
#endif
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Enables a PWM channel.
|
||
|
* @pre The PWM unit must have been activated using @p pwmStart().
|
||
|
* @post The channel is active using the specified configuration.
|
||
|
* @note The function has effect at the next cycle start.
|
||
|
* @note Channel notification is not enabled.
|
||
|
*
|
||
|
* @param[in] pwmp pointer to a @p PWMDriver object
|
||
|
* @param[in] channel PWM channel identifier (0...channels-1)
|
||
|
* @param[in] width PWM pulse width as clock pulses number
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
void pwm_lld_enable_channel(PWMDriver *pwmp,
|
||
|
pwmchannel_t channel,
|
||
|
pwmcnt_t width)
|
||
|
{
|
||
|
uint32_t pwm = pwmp->pwm;
|
||
|
|
||
|
/* Changing channel duty cycle on the fly.*/
|
||
|
if (channel & 1)
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPB) = width;
|
||
|
else
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPA) = width;
|
||
|
|
||
|
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CTL) = (1 << 0);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Disables a PWM channel and its notification.
|
||
|
* @pre The PWM unit must have been activated using @p pwmStart().
|
||
|
* @post The channel is disabled and its output line returned to the
|
||
|
* idle state.
|
||
|
* @note The function has effect at the next cycle start.
|
||
|
*
|
||
|
* @param[in] pwmp pointer to a @p PWMDriver object
|
||
|
* @param[in] channel PWM channel identifier (0...channels-1)
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel)
|
||
|
{
|
||
|
uint32_t pwm = pwmp->pwm;
|
||
|
|
||
|
if (channel & 1)
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPB) = 0;
|
||
|
else
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CMPA) = 0;
|
||
|
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_CTL) = (1 << 0);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Enables the periodic activation edge notification.
|
||
|
* @pre The PWM unit must have been activated using @p pwmStart().
|
||
|
* @note If the notification is already enabled then the call has no effect.
|
||
|
*
|
||
|
* @param[in] pwmp pointer to a @p PWMDriver object
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
void pwm_lld_enable_periodic_notification(PWMDriver *pwmp)
|
||
|
{
|
||
|
uint32_t inten;
|
||
|
uint8_t i;
|
||
|
uint32_t pwm = pwmp->pwm;
|
||
|
|
||
|
/* If the IRQ is not already enabled care must be taken to clear it,
|
||
|
it is probably already pending because the timer is running.*/
|
||
|
for(i = 0; i < (PWM_CHANNELS >> 1); i++) {
|
||
|
inten = HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_INTEN);
|
||
|
if ((inten & 0x03) == 0) {
|
||
|
HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_INTEN) |= 0x03;
|
||
|
HWREG(pwm + pwm_generator_offsets[i] + PWM_O_X_ISC) = 0x03;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
HWREG(pwm + PWM_O_INTEN) = 0x3f;
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Disables the periodic activation edge notification.
|
||
|
* @pre The PWM unit must have been activated using @p pwmStart().
|
||
|
* @note If the notification is already disabled then the call has no effect.
|
||
|
*
|
||
|
* @param[in] pwmp pointer to a @p PWMDriver object
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
void pwm_lld_disable_periodic_notification(PWMDriver *pwmp)
|
||
|
{
|
||
|
uint32_t pwm = pwmp->pwm;
|
||
|
|
||
|
HWREG(pwm + PWM_O_0_INTEN) = ~(0x03);
|
||
|
HWREG(pwm + PWM_O_1_INTEN) = ~(0x03);
|
||
|
HWREG(pwm + PWM_O_2_INTEN) = ~(0x03);
|
||
|
HWREG(pwm + PWM_O_3_INTEN) = ~(0x03);
|
||
|
|
||
|
HWREG(pwm + PWM_O_INTEN) &= ~(0x3F);
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Enables a channel de-activation edge notification.
|
||
|
* @pre The PWM unit must have been activated using @p pwmStart().
|
||
|
* @pre The channel must have been activated using @p pwmEnableChannel().
|
||
|
* @note If the notification is already enabled then the call has no effect.
|
||
|
*
|
||
|
* @param[in] pwmp pointer to a @p PWMDriver object
|
||
|
* @param[in] channel PWM channel identifier (0...channels-1)
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
|
||
|
pwmchannel_t channel)
|
||
|
{
|
||
|
uint32_t pwm = pwmp->pwm;
|
||
|
uint32_t inten = HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_ISC);
|
||
|
|
||
|
/* If the IRQ is not already enabled care must be taken to clear it,
|
||
|
it is probably already pending because the timer is running.*/
|
||
|
if ((inten & (0x03 << (((channel & 1) * 2) + 2))) == 0) {
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_INTEN) |= (0x03 << (((channel & 1) * 2) + 2));
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_ISC) = (0x03 << (((channel & 1) * 2) + 2));
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/**
|
||
|
* @brief Disables a channel de-activation edge notification.
|
||
|
* @pre The PWM unit must have been activated using @p pwmStart().
|
||
|
* @pre The channel must have been activated using @p pwmEnableChannel().
|
||
|
* @note If the notification is already disabled then the call has no effect.
|
||
|
*
|
||
|
* @param[in] pwmp pointer to a @p PWMDriver object
|
||
|
* @param[in] channel PWM channel identifier (0...channels-1)
|
||
|
*
|
||
|
* @notapi
|
||
|
*/
|
||
|
void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
|
||
|
pwmchannel_t channel)
|
||
|
{
|
||
|
uint32_t pwm = pwmp->pwm;
|
||
|
|
||
|
HWREG(pwm + pwm_generator_offsets[channel >> 1] + PWM_O_X_INTEN) = ~(0x03 << (((channel & 1) * 2) + 2));
|
||
|
}
|
||
|
|
||
|
#endif /* HAL_USE_PWM */
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|